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Cryptographic Hardware and Embedded Systems - CHES 2009 : 11th International Workshop Lausanne, Switzerland, September 6-9, 2009 Proceedings / edited by Christophe Clavier, Kris Gaj

By: Contributor(s): Resource type: Ressourcentyp: Buch (Online)Book (Online)Language: English Series: SpringerLink Bücher | Lecture notes in computer science ; 5747Publisher: Berlin, Heidelberg : Springer Berlin Heidelberg, 2009Description: Online-Ressource (digital)ISBN:
  • 9783642041389
Subject(s): Genre/Form: Additional physical formats: 9783642041372 | Buchausg. u.d.T.: Cryptographic hardware and embedded systems - CHES 2009. Heidelberg, Neckar : Springer Berlin, 2009. XVI, 472 S.DDC classification:
  • 005.82
  • 005.824 23
  • 004
MSC: MSC: *68-06 | 94-06 | 68P25 | 94A60 | 00B25LOC classification:
  • QA76.9.A25
  • TK7895.E42
DOI: DOI: 10.1007/978-3-642-04138-9Online resources: Summary: Software Implementations -- Faster and Timing-Attack Resistant AES-GCM -- Accelerating AES with Vector Permute Instructions -- SSE Implementation of Multivariate PKCs on Modern x86 CPUs -- MicroEliece: McEliece for Embedded Devices -- Invited Talk 1 -- Physical Unclonable Functions and Secure Processors -- Side Channel Analysis of Secret Key Cryptosystems -- Practical Electromagnetic Template Attack on HMAC -- First-Order Side-Channel Attacks on the Permutation Tables Countermeasure -- Algebraic Side-Channel Attacks on the AES: Why Time also Matters in DPA -- Differential Cluster Analysis -- Side Channel Analysis of Public Key Cryptosystems -- Known–Plaintext–Only Attack on RSA–CRT with Montgomery Multiplication -- A New Side-Channel Attack on RSA Prime Generation -- Side Channel and Fault Analysis Countermeasures -- An Efficient Method for Random Delay Generation in Embedded Software -- Higher-Order Masking and Shuffling for Software Implementations of Block Ciphers -- A Design Methodology for a DPA-Resistant Cryptographic LSI with RSL Techniques -- A Design Flow and Evaluation Framework for DPA-Resistant Instruction Set Extensions -- Invited Talk 2 -- Crypto Engineering: Some History and Some Case Studies -- Pairing-Based Cryptography -- Hardware Accelerator for the Tate Pairing in Characteristic Three Based on Karatsuba-Ofman Multipliers -- Faster -Arithmetic for Cryptographic Pairings on Barreto-Naehrig Curves -- Designing an ASIP for Cryptographic Pairings over Barreto-Naehrig Curves -- New Ciphers and Efficient Implementations -- KATAN and KTANTAN — A Family of Small and Efficient Hardware-Oriented Block Ciphers -- Programmable and Parallel ECC Coprocessor Architecture: Tradeoffs between Area, Speed and Security -- Elliptic Curve Scalar Multiplication Combining Yao’s Algorithm and Double Bases -- TRNGs and Device Identification -- The Frequency Injection Attack on Ring-Oscillator-Based True Random Number Generators -- Low-Overhead Implementation of a Soft Decision Helper Data Algorithm for SRAM PUFs -- CDs Have Fingerprints Too -- Invited Talk 3 -- The State-of-the-Art in IC Reverse Engineering -- Hot Topic Session: Hardware Trojans and Trusted ICs -- Trojan Side-Channels: Lightweight Hardware Trojans through Side-Channel Engineering -- MERO: A Statistical Approach for Hardware Trojan Detection -- Theoretical Aspects -- On Tamper-Resistance from a Theoretical Viewpoint -- Mutual Information Analysis: How, When and Why? -- Fault Analysis -- Fault Attacks on RSA Signatures with Partially Unknown Messages -- Differential Fault Analysis on DES Middle Rounds.Summary: This book constitutes the refereed proceedings of the 11th International Workshop on Cryptographic Hardware and Embedded Systems, CHES 2009, held in Lausanne, Switzerland during September 6-9, 2009. The book contains 3 invited talks and 29 revised full papers which were carefully reviewed and selected from 148 submissions. The papers are organized in topical sections on software implementations, side channel analysis of secret key cryptosystems, side channel analysis of public key cryptosystems, side channel and fault analysis countermeasures, pairing-based cryptography, new ciphers and efficient implementations, TRNGs and device identification, hardware trojans and trusted ICs, theoretical aspects, and fault analysis.PPN: PPN: 1648481981Package identifier: Produktsigel: ZDB-2-LNC | ZDB-2-SCS | ZDB-2-SXCS | ZDB-2-SEB
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