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Hierarchical modeling for VLSI circuit testing / by Debashis Bhattacharya and John P. Hayes

By: Contributor(s): Resource type: Ressourcentyp: BuchBookLanguage: English Series: Kluwer international series in engineering and computer science ; 89 : VLSI, computer architecture and digital signal processingPublisher: Boston [u.a.] : Kluwer, 1990Description: X, 159 SISBN:
  • 079239058X
Subject(s): DDC classification:
  • 621.395
  • 621.39'5'0287
  • 621.39/5/0287
RVK: RVK: ST 190Local classification: Lokale Notation: Bv 33 | Bv 29LOC classification:
  • TK7874
Action note:
  • 2
Call number: Grundsignatur: 90 A 3409PPN: PPN: 1651390703
Holdings
Item type Home library Shelving location Call number Status Barcode
Magazinbestand ausleihbar Bibliothek Campus Süd Geschlossenes Magazin 90 A 3409 Available 46165542090
Total holds: 0

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