Hierarchical modeling for VLSI circuit testing / by Debashis Bhattacharya and John P. Hayes
Contributor(s): Resource type: Ressourcentyp: BuchBookLanguage: English Series: Kluwer international series in engineering and computer science ; 89 : VLSI, computer architecture and digital signal processingPublisher: Boston [u.a.] : Kluwer, 1990Description: X, 159 SISBN:- 079239058X
- 621.395
- 621.39'5'0287
- 621.39/5/0287
- TK7874
- 2
| Item type | Home library | Shelving location | Call number | Status | Barcode | |
|---|---|---|---|---|---|---|
| Magazinbestand ausleihbar | Bibliothek Campus Süd | Geschlossenes Magazin | 90 A 3409 | Available | 46165542090 |
Total holds: 0
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