IP Cores Design from Specifications to Production : Modeling, Verification, Optimization, and Protection / by Khaled Salah Mohamed

By:

Mohamed, Khaled Salah [aut]

Resource type: Ressourcentyp: Buch (Online)Book (Online)Language: English Series: Analog Circuits and Signal Processing | SpringerLink Bücher | Springer eBook Collection EngineeringPublisher: Cham : Springer, 2016Description: Online-Ressource (IX, 154 p. 153 illus., 115 illus. in color, online resource)ISBN:

9783319220352

Subject(s):

Additional physical formats: 9783319220345 | Druckausg.: 978-3-319-22034-5 LOC classification:

TK7888.4

DOI: DOI: 10.1007/978-3-319-22035-2Online resources:

Summary: This book describes the life cycle process of IP cores, from specification to production, including IP modeling, verification, optimization, and protection. Various trade-offs in the design process are discussed, including those associated with many of the most common memory cores, controller IPs and system-on-chip (SoC) buses. Readers will also benefit from the author’s practical coverage of new verification methodologies. such as bug localization, UVM, and scan-chain. A SoC case study is presented to compare traditional verification with the new verification methodologies. · Discusses the entire life cycle process of IP cores, from specification to production, including IP modeling, verification, optimization, and protection; · Introduce a deep introduction for Verilog for both implementation and verification point of view. · Demonstrates how to use IP in applications such as memory controllers and SoC buses. · Describes a new verification methodology called bug localization; · Presents a novel scan-chain methodology for RTL debugging; · Enables readers to employ UVM methodology in straightforward, practical termsPPN: PPN: 1657942074Package identifier: Produktsigel: ZDB-2-ENG | ZDB-2-SEB | ZDB-2-SXE

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