Formal and Practical Techniques for the Complex System Design Process using Virtual Prototypes : Better Early than Never / by Pascal Pieper, Rolf Drechsler

By:

Pieper, Pascal [VerfasserIn]

Contributor(s):

Drechsler, Rolf [VerfasserIn]

Resource type: Ressourcentyp: Buch (Online)Book (Online)Language: English Publisher: Cham : Springer Nature Switzerland, 2024Publisher: Cham : Imprint: Springer, 2024Edition: 1st ed. 2024Description: 1 Online-Ressource(XXV, 172 p. 39 illus., 36 illus. in color.)ISBN:

9783031516924

Subject(s):

Additional physical formats: 9783031516917 | 9783031516931 | 9783031516948 | Erscheint auch als: 9783031516917 Druck-Ausgabe | Erscheint auch als: 9783031516931 Druck-Ausgabe | Erscheint auch als: 9783031516948 Druck-AusgabeDOI: DOI: 10.1007/978-3-031-51692-4Online resources:

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Summary: Introduction -- Preliminaries -- Hardware and Environment Modeling -- Verification -- Conclusion and Future Work.Summary: This book deals with formal and practical approaches for early fast modeling and verification of complex digital processor hardware and software using SystemC-based virtual prototypes. As a special focus, modeling approaches of instruction-level behavior of System-on-Chips and the connected off-chip digital devices are addressed. Featured verification approaches are based on symbolic execution of simulated hardware devices or on classical discrete execution of the whole system with dynamic data flow tracking. The approaches are accompanied by Case-Studies that develop and build on top of an open-source RISC-V SoC simulation. In Particular, this book: Discusses modeling, simulation and verification for complex digital system design, based on RISC-V case-studies; Presents established and novel techniques to model and verify HW/SW designs with a Virtual Prototype-based design flow; Focuses on early and approachable design space exploration of complex SoC designs for accelerated, low-risk development.PPN: PPN: 1884353894Package identifier: Produktsigel: ZDB-2-SEB | ZDB-2-ENG | ZDB-2-SXE

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