APA

Tan C. S., Gutmann R. J. & Reif L. R. (2008). Wafer level 3-D ICs process technology. New York, NY: Springer.

Chicago

Tan Chuan Seng, Gutmann Ronald J and Reif L Rafael. 2008. Wafer level 3-D ICs process technology. New York, NY: Springer.

Harvard

Tan C. S., Gutmann R. J. and Reif L. R. (2008). Wafer level 3-D ICs process technology. New York, NY: Springer.

MLA

Tan Chuan Seng, Gutmann Ronald J and Reif L Rafael. Wafer level 3-D ICs process technology. New York, NY: Springer. 2008.