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VHDL 101 : everything you need to know to get started / by William Kafig

By: Resource type: Ressourcentyp: Buch (Online)Book (Online)Language: English Publisher: Oxford ; Burlington, MA : Newnes/Elsevier, 2011Edition: Online-AusgDescription: Online-Ressource (1 online resource (xv, 200 p.)) : illISBN:
  • 9781282954465
  • 1282954466
  • 9780080959399
Subject(s): Additional physical formats: 1856177041 | 9780080959399 | 9781856177047 | 1282954350 | Druckausg.: 978-1-85617-704-7 DDC classification:
  • 621.395
LOC classification:
  • TK7885.7
Online resources: Summary: VHDL 101 is written for Electrical Engineers and others wishing to break into FPGA design and assumes a basic knowledge of digital design and some experience with engineering 'process'. Bill Kafig, industry expert, swiftly brings the reader up to speed on techniques and functions commonly used in VHDL (VHSIC Hardware Description Language) as well as commands and data types. Extensive simple, complete designs accompany the content for maximum comprehension. The book concludes with a section on design re-use, which is of utmost importance to today's engineer who needs to meet a deadline and lower costs per unit. *Gets you up to speed with VHDL fast, reducing time to market and driving down costs * Companion website with source code and other documents to assist the student in building the reference design used throughout the book (http://www.elsevierdirect.com/companion.jsp?ISBN=9781856177047) *Covers the basics including language concepts and includes complete design examples for ease of learning * Covers widely accepted industry nomenclature * Learn from "best design practices" Gets you up to speed with VHDL fast, reducing time to market and driving down costs Companion website with source code and other documents to assist the student in building the reference design used throughout the book (http://www.elsevierdirect.com/v2/companion.jsp?ISBN=9781856177047) Covers the basics including language concepts and includes complete design examples for ease of learning Covers widely accepted industry nomenclature Learn from "best design practices".Summary: Front Cover -- VHDL 101 -- Copyright -- Contents -- Preface -- About the Author -- Acknowledgments -- Chapter 1 Introduction and Background -- 1.1 VHDL -- 1.2 Brief History of VHDL -- 1.3 FPGA Architecture -- Chapter 2 Overview of the Process of Implementing an FPGA Design -- 2.1 Design Entry -- 2.2 Synthesis -- 2.3 Simulation -- 2.4 Implementation -- 2.5 Bitstream Generation -- Chapter 3 Loop 1 - Going with the Flow -- 3.1 The Shape of VHDL -- Chapter 4 Loop 2 - Going Deeper -- 4.1 Introducing Processes, Variables, and Sequential Statements -- 4.2 Tool Perspectives - Synthesis Options and Constraints -- Chapter 5 Loop 3 -- 5.1 Introducing Concept of Reuse -- 5.2 Flexibility Using Generics and Constants -- 5.3 Generate Statements -- 5.4 Functions and Procedures -- 5.5 Attributes -- 5.6 Packages -- 5.7 Commonly Used Libraries -- Appendix - A Quick Reference -- A.1 Language Constructs -- A.2 Data Types -- A.3 Standard Libraries -- Index.PPN: PPN: 809190443Package identifier: Produktsigel: ZDB-26-MYL | ZDB-30-PQE
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