Computer system design : system-on-chip / Michael J. Flynn, Wayne Luk

Von:

Flynn, Michael J, 1934- [aut]

Mitwirkende(r):

Luk, Wayne [oth]

Resource type: Ressourcentyp: Buch (Online)Buch (Online)Sprache: Englisch Verlag: Hoboken, N.J : Wiley, 2011Auflage: Online-AusgBeschreibung: Online-Ressource (1 online resource (xx, 334 p.)) : illISBN:

9781283157353
1283157357
9781118009901

Schlagwörter:

Andere physische Formen: 9780470643365 | 1283157268 | Druckausg.: Computer system design. Hoboken, New Jersey : Wiley, 2011. XX, 334 S.DDC-Klassifikation:

004.1

RVK: RVK: ST 150 | ST 170LOC-Klassifikation:

TK7895.E42

Online-Ressourcen:

Zugang im Netz des KIT

Zusammenfassung: Intro -- COMPUTER SYSTEM DESIGN -- CONTENTS -- PREFACE -- LIST OF ABBREVIATIONS AND ACRONYMS -- 1: Introduction to the Systems Approach -- 1.1 SYSTEM ARCHITECTURE: AN OVERVIEW -- 1.2 COMPONENTS OF THE SYSTEM: PROCESSORS, MEMORIES, AND INTERCONNECTS -- 1.3 HARDWARE AND SOFTWARE: PROGRAMMABILITY VERSUS PERFORMANCE -- 1.4 PROCESSOR ARCHITECTURES -- 1.4.1 Processor: A Functional View -- 1.4.2 Processor: An Architectural View -- 1.5 MEMORY AND ADDRESSING -- 1.5.1 SOC Memory Examples -- 1.5.2 Addressing: The Architecture of Memory -- 1.5.3 Memory for SOC Operating System -- 1.6 SYSTEM-LEVEL INTERCONNECTION -- 1.6.1 Bus-Based Approach -- 1.6.2 Network-on-Chip Approach -- 1.7 AN APPROACH FOR SOC DESIGN -- 1.7.1 Requirements and Specifications -- 1.7.2 Design Iteration -- 1.8 SYSTEM ARCHITECTURE AND COMPLEXITY -- 1.9 PRODUCT ECONOMICS AND IMPLICATIONS FOR SOC -- 1.9.1 Factors Affecting Product Costs -- 1.9.2 Modeling Product Economics and Technology Complexity: The Lesson for SOC -- 1.10 DEALING WITH DESIGN COMPLEXITY -- 1.10.1 Buying IP -- 1.10.2 Reconfiguration -- 1.11 CONCLUSIONS -- 1.12 PROBLEM SET -- 2: Chip Basics: Time, Area, Power, Reliability, and Configurability -- 2.1 INTRODUCTION -- 2.1.1 Design Trade-Offs -- 2.1.2 Requirements and Specifications -- 2.2 CYCLE TIME -- 2.2.1 Defining a Cycle -- 2.2.2 Optimum Pipeline -- 2.2.3 Performance -- 2.3 DIE AREA AND COST -- 2.3.1 Processor Area -- 2.3.2 Processor Subunits -- 2.4 IDEAL AND PRACTICAL SCALING -- 2.5 POWER -- 2.6 AREA-TIME-POWER TRADE-OFFS IN PROCESSOR DESIGN -- 2.6.1 Workstation Processor -- 2.6.2 Embedded Processor -- 2.7 RELIABILITY -- 2.7.1 Dealing with Physical Faults -- 2.7.2 Error Detection and Correction -- 2.7.3 Dealing with Manufacturing Faults -- 2.7.4 Memory and Function Scrubbing -- 2.8 CONFIGURABILITY -- 2.8.1 Why Reconfigurable Design?.PPN: PPN: 80933769XPackage identifier: Produktsigel: ZDB-26-MYL | BSZ-30-PQE-K1DLR | ZDB-30-PAD | ZDB-30-PQE

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