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Advanced interconnects for ULSI technology / [edited by] Mikhail Baklanov, Paul S. Ho, Ehrenfried Zschech

Contributor(s): Resource type: Ressourcentyp: Buch (Online)Book (Online)Language: English Publisher: Hoboken, NJ : Wiley, 2012Edition: Online-AusgDescription: Online-Ressource (1 online resource.)ISBN:
  • 9781280590801
  • 9781119963240
  • 1280590807
Subject(s): Additional physical formats: 9781119963240 | 9781119963677 | 9780470662540 | Erscheint auch als: Advanced interconnects for ULSI technology. Druck-Ausgabe. 1. publ. Chichester : Wiley, 2012. XXVI, 579 S. | Erscheint auch als: Advanced interconnects for ULSI technology Druck-AusgabeDDC classification:
  • 621.395
  • 621.39/5 23
RVK: RVK: ZN 4125 | ZN 4952LOC classification:
  • TK7874.53
Online resources: Summary: Finding new materials for copper/low-k interconnects is critical to the continuing development of computer chips. While copper/low-k interconnects have served well, allowing for the creation of Ultra Large Scale Integration (ULSI) devices which combine over a billion transistors onto a single chip, the increased resistance and RC-delay at the smaller scale has become a significant factor affecting chip performance. Advanced Interconnects for ULSI Technology is dedicated to the materials and methods which might be suitable replacements. It covers a broad range of topics, from physical principles to design, fabrication, characterization, and application of new materials for nano-interconnects, and discusses: Interconnect functions, characterisations, electrical properties and wiring requirements Low-k materials: fundamentals, advances and mechanical properties Conductive layers and barriers Integration and reliability including mechanical reliability, electromigration and electrical breakdown New approaches including 3D, optical, wireless interchip, and carbon-based interconnects Intended for postgraduate students and researchers, in academia and industry, this book provides a critical overview of the enabling technology at the heart of the future development of computer chips.Summary: Intro -- Advanced Interconnects for ULSI Technology -- Contents -- About the Editors -- List of Contributors -- Preface -- Abbreviations -- Section I Low-k Materials -- 1 Low-k Materials: Recent Advances -- 1.1 Introduction -- 1.2 Integration Challenges -- 1.2.1 Process-Induced Damage -- 1.2.2 Mechanical Properties -- 1.3 Processing Approaches to Existing Integration Issues -- 1.3.1 Post-deposition Treatments -- 1.3.2 Prevention or Repair of Plasma-Induced Processing Damage -- 1.3.3 Multilayer Structures -- 1.4 Material Advances to Overcome Current Limitations -- 1.4.1 Silica Zeolites -- 1.4.2 Hybrid Organic-Inorganic: Oxycarbosilanes -- 1.5 Conclusion -- References -- 2 Ultra-Low-k by CVD: Deposition and Curing -- 2.1 Introduction -- 2.2 Porogen Approach by PECVD -- 2.2.1 Precursors and Deposition Conditions -- 2.2.2 Mystery Still Unsolved: From Porogens to Pores -- 2.3 UV Curing -- 2.3.1 General Overview of Curing -- 2.3.2 UV Curing Mechanisms -- 2.4 Impact of Curing on Structure and Physical Properties: Benefits of UV Curing -- 2.4.1 Porosity -- 2.4.2 Chemical Structure and Mechanical Properties -- 2.4.3 Electrical Properties -- 2.5 Limit/Issues with the Porogen Approach -- 2.5.1 Porosity Creation Limit -- 2.5.2 Porogen Residues -- 2.6 Future of CVD Low-k -- 2.6.1 New Matrix Precursor -- 2.6.2 Other Deposition Strategies -- 2.6.3 New Deposition Techniques -- 2.7 Material Engineering: Adaptation to Integration Schemes -- 2.8 Conclusion -- References -- 3 Plasma Processing of Low-k Dielectrics -- 3.1 Introduction -- 3.2 Materials and Equipment -- 3.3 Process Results Characterization -- 3.4 Interaction of Low-k Dielectrics with Plasma -- 3.4.1 Low-k Etch Chemistries -- 3.4.2 Patterning Strategies and Masking Materials -- 3.4.3 Etch Mechanisms -- 3.5 Mechanisms of Plasma Damage -- 3.5.1 Gap Structure Studies -- 3.5.2 Effect of Radical Density.PPN: PPN: 809663643Package identifier: Produktsigel: ZDB-26-MYL | ZDB-30-PAD | ZDB-30-PQE
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