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Design technology co-optimization in the era of sub-resolution IC scaling / Lars W. Liebmann, Kaushik C. Vaidyanathan, and Lawrence Pileggi

By: Contributor(s): Resource type: Ressourcentyp: Buch (Online)Book (Online)Language: English Series: Tutorial texts in optical engineering ; volume TT104Publisher: Bellingham, Washington : SPIE, [2016]Copyright date: © 2016Description: 1 Online-RessourceISBN:
  • 9781628416695
Subject(s): Additional physical formats: 9781628418668 DDC classification:
  • 621.3815 23
LOC classification:
  • TK7874
DOI: DOI: 10.1117/3.2217861Online resources: Additional physical formats: Also available in print version.Summary: Tackle the challenges facing the most advanced technology nodes in the microelectronics industry with the help of design technology co-optimization (DTCO). This mediation process aims to ensure competitive technology architecture definition while avoiding schedule or yield risks caused by unrealistically aggressive process assumptions. Find the answers in this Tutorial Text, which reviews the fundamental design objectives as well as the resulting topological constraints of a standard cell logic design flow; cell design, placement, and routing are examined against the backdrop of ever-increasing design constraints in advanced technology nodesSummary: 1. The escalating design complexity of sub-resolution scaling -- 2. Multiple exposure patterning enhanced digital logic design -- 3. Design for manufacturability -- 4. Design technology co-optimization (DTCO) -- referencesPPN: PPN: 847970531Package identifier: Produktsigel: ZDB-50-SPI
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